Archive for November, 2006

Behavioral Modeling vs RTL

Friday, November 17th, 2006

Over the years, I have discovered that many engineers think that behavioral and register transfer level models are the same. On closer questioning I find that these engineers are unware that a higher level of abstraction exists above RTL. Well there is, and when it comes to board and system level design and verification, the difference is very important.

The short version of the comparison is: a behavioral model describes what something does; an RTL model describes how it does it. For example, an RTL adder must describe the registers for the operands, the carry method, and a clock. It may be done in various ways to balance speed and area. For a behavioral adder, A + B = C is sufficient. As you might imagine, A + B = C also simulates a lot faster than all those gates and registers in the RTL model.

FMF models are behavioral in their level of abstraction. Their purpose is to faithfully model what happens at a component’s pins without regard to how the component is actually implemented. In addition, they have features that are intended to aid the debugging of designs that do not work correctly. These features come in two categories: functional and timing. (more…)