Archive for January, 2007

SystemC – What Is It Good For?

Wednesday, January 17th, 2007

Now that SystemC has been around for a few years, it seems the hype about it is somewhat diminished. FMF has offered SystemC modeling services for some time but we have never had any inquiries much less takers. This leads me to the question, “From a board-level modeling perspective, what advantage does SystemC offer over VHDL or SystemVerilog?” Is there any?

If you know or have an opinion, please let me hear from you.