Library Integration Just Got Easier

In April, I wrote about the advantages of having a schematic library architecture that supports downstream processes such as functional verification.  For users of the PCB Matrix Symbol Wizard, building symbols for such a library just got easier.  In it latest release, this tool can now read FMF VHDL and Verilog models, and from them, generate schematic symbols for most popular schematic capture systems.

Generating the symbols from the simulation models makes integrating simulation and schematic capture much simpler.  The problem usually faced is that the schematic’s HDL netlister wants to use the symbol pin names to instantiate a component in the netlist.  When the symbol and model are created separately, these pin names rarely match.  Some schematic tools allow the use of a mapping file to change the netlist pin names to the desired values.  Creating that mapping file is time consuming and error prone.  However, creating the schematic symbol from the model ensures that the pin names match and eliminates the need to build and maintain mapping files.

I am happy to see PCB Matrix (a Valor company) take advantage of the open source nature of FMF models to provide new value to their customers.

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