Category: FMF Topics

Here are my thoughts on what were for me, the top three sessions at DVCon. “Techononmics of Verification” by Aart de Geus. If you have ever attended one of Aart’s talks, you already know he is a fanastic speaker.  Through amusing graphics and wry humor he showed how global practices and financial instruments created a… Continue reading Thoughts from DVCon

In December, Largine responded to a previous post by asking for more information about FMF’s modeling style.  I will try to answer here primarily by referencing more detailed sources of information. First, one might ask why there should even be an “FMF style” for component models.  The answer is that by making models uniform in… Continue reading FMF Modeling Style

This is the sixth and final installment of the FMF/Spansion presentation given at the Flash Memory Summit of August 2008 in Santa Clara California.  If you are just tuning in, the first installment was posted in December 2008. It has taken a long time but, most IC companies have seen the advantages of providing simulation… Continue reading FMF/Spansion Presentation – Part 6 (Last)

Free Model Foundry was founded by board designers for board designers.  We had verification problems that were not being addressed to our satisfaction by the semiconductor companies.  The EDA industry made an effort through Logic Automation and some proprietary libraries but, their business models prevented them from providing what we needed. What we needed was:… Continue reading FMF/Spansion Presentation – Part 5

Free Model Foundry was founded expressly to promote board and system-level verification.  The founders were all board-level engineers who wanted to simulate their circuits before having them laid out, fabed and assembled as printed circuit boards.  We were working in a military/aerospace environment on designs that were considered very high speed (for that time).  We… Continue reading FMF/Spansion Presentation – Part 4