System Verification Blog

Since you are reading the FMF blog, I will assume you use, or are at least interested in, FMF models. Traditionally, the most difficult aspect of board level simulation has been acquiring the needed models. FMF was created to address that need. We work with component vendors to provide the models you require to verify your board designs. Although we make the models free for you, they are not free for the component vendors. They must expend both money and human resources to support your simulations.

Like any other business, IC companies want to spend money only where they will get a return. If they are convinced that their customers need simulation models and that having models improves sales, then they will do what is necessary to provide models. However, if they do not hear from their customers that models are needed, they will not provide them. Therefore, it is up to you to make sure your IC suppliers know that you need open source simulation models to help you design in their components.

There are two ways to make that need known. You can contact your suppliers directly, and tell them frequently, which of their components you are interested in but lack models. Or, you can use the “Request a Model” form on the FMF website to tell us. If you tell which models you need and from which vendor, we will contact that vendor and explain to them what your needs are and what they can do about it. We will also keep you informed as to our progress.

Either way, it is up to you to make sure your IC vendors understand what you need to get your job done.

For any who do not know John Cooley, he is best described as one of the more colorful characters upon the EDA landscape. He began his “East Coast Synopsys Users Group“ (ESNUG) around 1991 to discuss workarounds to the Synopsys Design Compiler and now has 23,000 subscribers and an EDA website called DeepChip. You can get the full background story from this article by Peggy Aycinena.

John also provides an annual “My Cheesy Must See List for DAC”. This is his unofficial guide to the Design Automation Conference (DAC) and includes important information such as what toys each vendor is giving away, and John’s opinion of their product. For the last several years, this list has included a line stating that Denali has a monopoly on memory models. (more…)

FMF recently had a major IC company contact us to say they wanted to do business with us and have us begin modeling some of their components. We had been trying to sell our services to this company for nine years so I needed to know why they were coming around now. The answer was simple - their customers were asking for FMF models. The nine years of marketing meant nothing to them, it was their customers’ requests they paid attention to. This is as it should be.

Every company that desires to survive and grow needs to listen to its customers. FMF has two classes of customers: the IC companies that pay us; and, their customers who use our models to design-in the IC companies’ parts. You are most likely one of the later.

As an FMF customer, we need your feedback. We need to know what you like and don’t like about our models. How is the accuracy and the performance? How is the ease of use? What can we do to make your board-level verification job easier?

If you will make the effort to give us this feedback, and tell us your expectations, we promise to try to exceed them.

An engineer and user of FMF (www.FreeModelFoundry.com) component models was recently having difficulties simulating a design that included a large amount of memory. His simulations would die during elaboration because his PC did not have enough memory. He was advised by an applications engineer from his simulator vendor that Verilog models would consume less computer memory than VHDL models.

This seemed contrary to my personal experience. I wanted to say the applications engineer was wrong but, I hate making a fool of myself in public (again) and did not have the numbers to back me up. I told the engineer I would get the numbers and report back to him.

Which language has the smaller footprint for memory models? I ran some tests to find out. A summary of the results are presented below. A full report is available in a white paper on the FMF website. (more…)

First, lets understand what we mean by models. We will restrict this discussion to digital ICs. There are at least three distinct types of models system designers might need.

Signal integrity models are needed to verify that the traces connecting the different parts on the board and across the backplane will carry the signals from chip to chip without introducing so much distortion that the receiver will be unable to correctly interpret its inputs. This type of model is usually supplied in IBIS format but may also be in Hspice or VHDL-AMS. IC companies do a fair job of providing these.

If an IC incorporates JTAG, it should have another type of model that defines the JTAG boundary scan chain. This type of model comes in a language called BSDL and IC companies are quite good at providing them when appropriate.

A third type of model is for functional simulation. A few IC companies do an excellent job providing these, most IC companies are fair to poor at providing them and, some companies do not provide them at all.

Why are simulation models important? What do engineers do with them? How can the IC industry do a better job supplying them?

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